FPGA Image Compatibility

Hi Wishbone:

Yes you are absolutely right that Hold could be an issue especially at the fast corner. I have used C8 bitfiles on C7 devices in the past, but only in development and not production. (I experienced no issues)

I looked in timing quest to see if there was a way to just re-run timing with the different speed grade, but unfortunately that didn't seem to be the case.

Knowing the industry, my expectation is that the fast corner of all the devices of the same device/package combination would be the same, but the slow corner would be relaxed for the slower speed grades. (Since they are the same physical die).

However without examining the timing files directly, I can't guarantee this statement.

Pete