FPGA early input output planning

Hi,

There's one more important step I forgot to mention: Assignments -> Device -> Device and Pin Options

You need to double check the settings on those tabs. Some will be fine by default, some you won't care, some you'll need to change. But you must be very sure about each is each. This will take you a bit of digging through the literature.

Back to pin assignment, when you hover the mouse over a pin, it lists the pin's multiple functions/capabilities.

What you need are pins which include the "I/O" function -- by far, the most common type of pin. The pin's caption will, probably, list other functions/features but do not worry about them.

After that, synthesize your design.

It's very possible that, at the first attempt, synthesis will fail because you have invalid pin assignments.

If that happens, you need to research the error, fix the assignment and synthetize again.

There are so many rules for FPGA pin assignment that it's nearly impossibe to get it right at first attempt.

That's why it is so important to create a top level module, assign the pins and the synthetize the design, so that tools can report errors.