FPGA drive current effect on power draw in Cyclone IV

There is absolutely nothing wrong with changing the drive strength to solve the problem and I say it's a valid solution and probably really part of the design rather than a problem. I mean, if I use the wrong drive strength on certain interfaces I can expect them to fail. If it were me, I would do some thorough testing just to make sure that there isn't something in the PCB design that needs to be fixed (poorly routed traces or stubs or something). If not, I'd change the drive strength and call it good.