fpga design for 2.4GHz

The FPGA high-speed transceivers are I/O pins. They can be configured for data rates of up to around 3.5Gbps on the mid-range devices, 8.5Gbps on the Stratix IV GX, and over 10Gbps on the Stratix IV GTs, and newer Stratix V series.

As others have commented PCIe is supported, as are ethernet interfaces. PCIe has implementations that use logic within the FPGA, and hard-IP implementations where the PCIe interface is mostly implemented in the I/O element of the FPGA. Ethernet interfaces such as 10G XAUI can be implemented using the high-speed transceivers. SGMII can probably be implemented using 1.25Gbps LVDS, rather than using a high-speed transceiver.

I think PCIe would probably be the easiest solution, as then the Atom would see the FPGA as a device on the PCI bus. There are Atom processors with an FPGA already interfaced as a target, I believe its the E600 core. Google 'Atom and FPGA' and you'll get hits, eg. Kontron has a board E665CT, which consists of an Atom Processor and an Arria GX 2 FPGA.

Cheers,

Dave

hi..

thank you for your valuable reply,

with out using any onboard FPGA features is it possible to achieve using i/o pins?

You have to distinguish between the data rate (word rate) of the parallel data pathes and the bit rate of serial interfaces (e.g. PCIe, SATA, Ethernet). This applies both for FPGA and processors. The word rate required for PCIe or GBit Ethernet can be handled by most FPGA.

Some newer Altera FPGA (Arria II, Cyclone IV GX) have on-board hardware PCIe (Gen 1 2.5 GBps) interfaces.

i am looking for intel atom processor

interface may be pciexp or ethernet

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2. i want to use an fpga between triplexer and processor whose signal speed is 2.4 GHz

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Which "processor" and interface standard are you referring to?