fpga design for 2.4GHz

The FPGA high-speed transceivers are I/O pins. They can be configured for data rates of up to around 3.5Gbps on the mid-range devices, 8.5Gbps on the Stratix IV GX, and over 10Gbps on the Stratix IV GTs, and newer Stratix V series.

As others have commented PCIe is supported, as are ethernet interfaces. PCIe has implementations that use logic within the FPGA, and hard-IP implementations where the PCIe interface is mostly implemented in the I/O element of the FPGA. Ethernet interfaces such as 10G XAUI can be implemented using the high-speed transceivers. SGMII can probably be implemented using 1.25Gbps LVDS, rather than using a high-speed transceiver.

I think PCIe would probably be the easiest solution, as then the Atom would see the FPGA as a device on the PCI bus. There are Atom processors with an FPGA already interfaced as a target, I believe its the E600 core. Google 'Atom and FPGA' and you'll get hits, eg. Kontron has a board E665CT, which consists of an Atom Processor and an Arria GX 2 FPGA.

Cheers,

Dave