Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Force a signal in the output of a logical gate: destructive?

Hi all! I've got a question that seems rather stupid at first: what happens if I try to put a signal in the output of a FPGA logic? Let me explain why this problem could happen: I have to ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

That's a very good idea! I will try to do that :)

Thanks for the tip :)