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Space applications either use radiation hardened devices, and/or a combination of redundant circuits, i.e., multiple instances of the same logic are implemented in the device and 'voting' logic determines the majority answer, and that majority drives the output-enable or whatever.
Cheers,
Dave
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In fact my work's graduate is just about that: creating a complete TMR system, including the voter. But there is still a point where you have to put your 3 entries together. When data travel in one direction, I use a three state buffer controlled by a voting logic to disable a path if there is a problem in it. (See Xilinx application note 197)
But when I use a bi directional port, there is two signals that must drive the tree state buffer: the voting logic, and the signal that says if the port is in input or output. Which means I have to AND that two signals. And if there is a SEU just at this AND gate, I can have problems.
If I was able to put two three states buffer in serie, there will be no problem, but it's impossible in the FPGA... And rad hard external three-state buffer are way too slow.
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