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Altera_Forum
Honored Contributor
Honored ContributorFlex 6000 clock gating
Hi I've been converting a 10 year old non-synchronous design to make synchronous so that it is more robust. Due to the available clocks on the board, it is necessary to use a gated clock. The o...
Altera_ForumHonored Contributor
Honored ContributorHi,
do you have to provide those gated clocks to external circuits? Or will they be used only within the FPGA? If the later, I recomend that instead of clock gating, you design with clock enables.
