Honored ContributorHi everyone! I'm learning about fixed point in verilog. I do not understand how to declare it. For example, the sign, the exponent and mantissa how to declare. Can u give me a specific example ? Please help me. :cry:
Honored ContributorExponents won't be used in fixed point arithmetic. It uses regular unsigned or signed bit vectors with an implicite decimal point. If you have a signed bit vector
reg signed [15:0] num16 then you can decide to interprete it as fixed point number with a point between bit 7 and bit 8. In other words you apply a factor of 256, and the bit vector represents a range of -128.000 to 127.996 in your code. To clarify the fixed point nature, you can also change the bit numbering to reg signed [7:-8] fpnum_8_8 Numerical operations performed on the fixed point numbers are the same as with integer numbers. The difference matters, when you want to scale multiply results. Generally, you get a 32 bit result from a 16x16 multiply. If it's integer and you want to keep the 16 bit range, then you have to cut 16 bits on the left, preferably with saturation in case of an overflow. With a multiply of 8.8 fixed point numbers, you have to cut 8 bits on the left and 8 on the right.Honored Contributoroh sorry maybe I was wrong. Fixed point is declare with the form
Q [QI]. [QF], with the integer bits QI, QF is the fractional bits. Do I understand right ? I wonder how many bits of the fixed point is maximum. Next I would like to declare fixed point in verilog like? For example, with the number 3.125 ? Thank you.Honored ContributorI'm mostly using VHDL and have only limited knowledge of Verilog. I can't tell you, how to perform similar constant calculations effectively. 3.125 is a real constant, you have to multiply it with a scaling factor according to your fixed point format, round the result to integer and assign the number to the bit vector representing the fixed point number. In VHDL, you can also utilize the IEEE fixed point package with conversion functions.
