Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI'd love to be able to get this block to infer the arrays as RAM,
but would it just be better if I used this block to generate read and write signals for an instanced altsyncram block for each (cl, x and y) and then pipe the dval and fval through 2 DFF so that they match the read output of the RAM blocks? Mat.