ericmtzr
Occasional Contributor
3 years agoFailure to decrypt IP Core
We received an encrypted IP core from "Praesum Communications" to use on our Arria 10 GX FPGAs. Platform Designer is able to generate HDL and the IP Generation compilation step work, however, when it gets to Analysis and Synthesis, I get a lot of “decryption of data_block failed” errors. The IP core was encrypted using Quartus 22.2 on Linux. I am compiling on Windows 10 and have tried both Quartus 20.2 and 22.2, but receive the same errors in both cases. I found this help article (link below) referencing line ending issues, so I converted all line endings to Windows using unix2dos, but that did not resolve the issues.
https://www.intel.com/content/www/us/en/support/programmable/articles/000080956.html
Any recommendations?