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ericmtzr's avatar
ericmtzr
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

Failure to decrypt IP Core

We received an encrypted IP core from "Praesum Communications" to use on our Arria 10 GX FPGAs. Platform Designer is able to generate HDL and the IP Generation compilation step work, however, when it...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
4 years ago

If the IP is encrypted in Quartus using IEEE, by right it should be able to compile.

Is the vendor IP currently working with the Intel on resolving the issue?

Do you still need my help? If so, I need a way to duplicate the issue from my end. e.g. a dummy IP.