Forum Discussion
Hi @NurAiman_M_Intel
Thanks for your response.
We have downloaded the project from below link(Design store )
https://fpgacloud.intel.com/devstore/platform/20.4.0/Pro/intel-arria-10-fpga-remote-system-update-via-pci-express/
arria10_pcie_rsu.par.
We extracted the project and using it.
when we do that we got master image and its named like below image
We used same rpd file. Initially we tried with our own rpd file. Errors are same.
Below one is with master image (PFA for detailed log)
#################################################################################
# PCIe information: #
# Vendor ID 1172 #
# Device ID e001 #
# Operating at 8 GT/s with 4 lanes #
#################################################################################
#######################################################################################
#RSU Over PCIe Linux User Application #
#Operation steps: #
#Step1 : Select whether or not to download the application image into FLASH. #
#Step2 : Enter start and end address of application image to be downloaded into FLASH #
#Step3 : Enter the application image file directory #
#Step4 : Select whether or not to reconfigure the FPGA #
#Step5 : Enter start address of reconfiguration image in FLASH #
#######################################################################################
Flash Device ID: 1021bb20
Step1 : Do you want to download the application image to FLASH?
(Please input 'y' or 'n' to select, and press ENTER to go on):y
Step2 : Please input start and end address of application image downloaded to FLASH.
(You could get below information from *.map file, and input here.)
(Warning: Please use start address 0x0 if you are downloading factory image!!!)
START ADDRESS :0x04000000
END ADDRESS :0x05568FFF
Step3 : PLease input program file directory.
(For example: /home/rsu_over_pcie/user/ru_auto.rpd)
/home/jetson/GRL_C2V/A10_Flash/master_image/ru_auto.rpd
Info : Download application image into Flash, file size is 22450176 Bytes, start address is 0x4000000
Erasing EPCQ flash ...
################################################## 100%
Writing EPCQ flash ...
flash_controller_write offset_temp = 0x4000000 buf_offset = 0x0 burst_length = 0x10000
-------------------------------------------------- 0%flash_controller_write offset_temp = 0x4010000 buf_offset = 0x10000 burst_length = 0x10000
..
..
#################################################- 99%flash_controller_write offset_temp = 0x5560000 buf_offset = 0x1560000 burst_length = 0x9000
################################################## 100%
Reading back data from Flash ...
read_back_data_check file_size = 0x1569000 file_size_count = 0x1569000
read_back_data_check offset_temp = 0x4000000 buf_offset = 0x0 burst_length = 0x10000
Warning : Flash data error at addr 0xc000000, expected data is 0x3a, but read data is 0x0
Warning : Checking stop due to read back data error
Step4 : Do you want to reconfig FPGA?
(Please input 'y' or 'n' to select, and press ENTER to go on):