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Altera_Forum's avatar
Altera_Forum
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14 years ago

Excalibur FPGA JTAG Issues

Hey all,

I'm working on a legacy project that is using an EXPA10 FPGA with an ARM922T processor built in. I'm currently trying to program it via JTAG, but when I scan the chain, It comes up saying that there is a problem with the JTAG chain. When I go into Debug, I can see the EXPA10 Device, and the ARM922T shows up as "Unkown9220DD".

I've checked the solder joints, and have checked the signal integrity on the JTAG lines and everything seems to be built correctly, but I can't seem to detect the full JTAG chain.

The board was designed to have MSEL 0, MSEL 1 tied low and the Boot Flash is tied high, so it's suppose to boot from flash, but there is nothing loaded into flash yet.

I guess my question is should I be able to see the full JTAG chain? or do I have to have something in the flash first to tell the PLD to connect to the ARM section of the FPGA?

Thanks!!!

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    I've tried different versions of Quartus (ver. 11, 2.2, currently on 9) and haven't had any luck with any of those.

  • Altera_Forum's avatar
    Altera_Forum
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    Please cut and paste the output from `jtagconfig --debug` as that should make it obvious what is going on. I suspect that the excalibur part has been removed from the Quartus parts database which is why you're seeing this behaviour.

  • Altera_Forum's avatar
    Altera_Forum
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    I have a feeling of that to, but what's interesting is that I have another board (golden unit that has been programmed, not by us thou) that actually detects the JTAG chain just fine.

    At any rate, when I use jtagconfig, the response I get is

    '1) ByteBlasterMV [LPTL1] "ByteBlasterMV or ByteBlaster II"

    Unable to read device chain (JTAG chain broken)
  • Altera_Forum's avatar
    Altera_Forum
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    wombat, looks like EXPA parts are still listed in pgm_parts.txt in 11.0sp1

  • Altera_Forum's avatar
    Altera_Forum
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    in that case you've pretty well narrowed it down to a board/fpga issue

  • Altera_Forum's avatar
    Altera_Forum
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    I had a feeling it was that, but I wanted to make sure that I was debugging this correctly before I chalked it up to the part / board. I think the root cause of everything is that the TMS or TCK lines within the FPGA are garbage, that's why I'm seeing both devices in debug, but not detecting the full chain like I should be able to.

    Thanks everyone for your input! If anybody else has input / feedback, it is greatly appreciated.