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Altera_Forum
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13 years ago

Example project for Arria II GX dev kit

Hello all.

Does any have an example project for Arria II GX dev board (EP2AGX125 version) that includes all peripherials installed on the board?

Thanks.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    Nobody have it?

    --- Quote End ---

    I guess not :)

    Have you downloaded the development kit files from the Altera web site?

    They typically have a 'golden reference' top-level file that you can use as an initial starting point. They also have example designs showing that each function of the board works.

    I don't have this particular kit, so cannot comment on what is available.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I'm successfully implement a DDR2 and DDR3 memories and some pripherials in one project.

    So, at now i try to add TSE_MAC in project. And i have problems.

    The tse modules connections is typically as other many projects. FPGA project compiles succesfully. Nios project also successfully compiles.

    But when i load project on board, then NIOS console show it: 

    
 Inst & Data Cache Initialized.
 Setting up stack and global pointers.
 Clearing BSS 
 Calling alt_main.
 Entering alt_main, calling alt_irq_init.
 Done alt_irq_init, calling alt_os_init.
 Done OS Init, calling alt_sem_create.
 Calling alt_sys_init.

    and stops the loading.

    I research that app (ucos) stop at alt_sys_init.c: 

    
void alt_sys_init( void )
{
    ALTERA_AVALON_TIMER_INIT ( HIGH_RES_TIMER, high_res_timer);
    ALTERA_AVALON_TIMER_INIT ( SYS_CLK_TIMER, sys_clk_timer);
    ALTERA_AVALON_JTAG_UART_INIT ( JTAG_UART, jtag_uart);
    ALTERA_AVALON_LCD_16207_INIT ( LCD, lcd);
    ALTERA_AVALON_PERFORMANCE_COUNTER_INIT ( PERFORMANCE_COUNTER, performance_counter);
    ALTERA_AVALON_SGDMA_INIT ( SGDMA_RX, sgdma_rx);
    ALTERA_AVALON_SGDMA_INIT ( SGDMA_TX, sgdma_tx);
    ALTERA_AVALON_SYSID_QSYS_INIT ( SYSID, sysid);
    TRIPLE_SPEED_ETHERNET_INIT ( TSE_MAC, tse_mac);
}
    at line altera_avalon_timer_init ( sys_clk_timer, sys_clk_timer);

    So, the sys_clk_timer period sets to 10 ms. It more than needed for most projects. But it can't init the timer.......

    Reset and Exception vectors are set to Oh-Cnip memory.

    Why?

    SOPC system attached:

    http://www.alteraforum.com/forum/attachment.php?attachmentid=5811&stc=1&d=1335511668
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Solved. The problem was in SOPC-system addressing. (28-bit GCC warning in Qsys).

    I remap modules addresses, rebuild, recompile and download project to board.

    It work.

    But didn't ping now :)

    Log: 

    
 Calling alt_main.
 Entering alt_main, calling alt_irq_init.
 Done alt_irq_init, calling alt_os_init.
 Done OS Init, calling alt_sem_create.
 Calling alt_sys_init.
 Done alt_sys_init.
 Redirecting IO.
 Calling C++ constructors.
 Calling atexit.
 Calling main.
InterNiche Portable TCP/IP, v3.1 
Copyright 1996-2008 by InterNiche Technologies. All rights reserved. 
prep_tse_mac 0
Can't read the MAC address from your board. We will assign you
a MAC address.
Please enter your 9-digit serial number. This is printed on a 
label under your Nios dev. board. The first 3 digits of the 
label are ASJ and the serial number follows this.
 -->Created "Inet main" task (Prio: 2)
Created "clock tick" task (Prio: 3)
497852135
497852135
Your Ethernet MAC address is 00:07:ed:ff:9e:e7
Static IP Address is 192.168.1.2
prepped 1 interface, initializing...
INFO    : TSE MAC 0 found at address 0x10002000
INFO    : PHY Marvell 88E1111 found at PHY address 0x00 of MAC Group
INFO    : PHY - Automatically mapped to tse_mac_device
INFO    : PHY - Restart Auto-Negotiation, checking PHY link...
INFO    : PHY - Auto-Negotiation PASSED
MARVELL : Mode changed to RGMII/Modified MII to Copper mode
MARVELL : Enable RGMII Timing Control
MARVELL : PHY reset
INFO    : PHY - Checking link...
INFO    : PHY - Link not yet established, restart auto-negotiation...
INFO    : PHY - Restart Auto-Negotiation, checking PHY link...
INFO    : PHY - Auto-Negotiation PASSED
INFO    : PHY - Link established
INFO    : PHY - Speed = 1000, Duplex = Full
OK, x=17, CMD_CONFIG=0x00000000
MAC post-initialization: CMD_CONFIG=0x0400020b
 RX descriptor chain desc (1 depth) created
mctest init called
IP address of et1 : 192.168.1.2
 Simple Socket Server listening on port 30
Created "simple socket server" task (Prio: 4)
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    TX LED on Ethernet port never blink... But RX LED is blink...

    I try to use some constraints, modify nios code but no effect....

    Confused (((((

    Can anybody help?