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Altera_Forum
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16 years ago

Error: Too many output and bidirectional pins in I/O bank 2

Hi, everybody. I am designing a new product on EP2C5Q208C8. In the design ,I use DDR sdram controller. so ,there are many sstl2 standard pins. But, I encounter the following error. how to ru...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

jakobjones is basically right, there are however two cases, where the problem may simply overcome:

- The error occurs, because you missed to specify correct output_enable_groups for the DQ and DQS pins. This may happen, if you didn't import all files generated by DDR controller Megawizard

- The conflicting pins are fully static in normal operation and IO distance rules check can be disabled by specifying a toogle rate of 0 MHz.