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cdsteinkuehler's avatar
cdsteinkuehler
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3 years ago

Error (16058): PLLs that use the x1 clock network and same HSSI channel must be in the same bank

I have a working Arria-V design that incorporates multi-rate SDI I/O (using our own logic, not the Altera IP blocks). The design was originally implemented using Quartus 15.0 however I have recently...
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Kshitij_Intel's avatar
Kshitij_Intel
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3 years ago

Hi,


Are you using SDI II IP with dynamic switch enable?


Can you please try with the latest version of Quartus 23.x.


Thank you

Kshitij Goel


cdsteinkuehler's avatar
cdsteinkuehler
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3 years ago

As mentioned, we are using our own IP for SDI but it supports "multi-rate" with each GXB Tx and Rx channel able to independently run at SD, HD, or 3G line rates. This functionality is similar to the Altera SDI IP with dynamic switch enabled.

I am confused by your request to try with Quartus 23.x. It appears Quartus 23.x is only available for "Quartus Pro", which does not support the Arria-V device family. I will try with the current latest "Quartus Standard" 22.1.1 and report my results.

  • cdsteinkuehler's avatar
    cdsteinkuehler
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    3 years ago

    Verified I get the same issue (Error 16058) using Quartus 22.1std.1 Build 917, which I believe is the latest version of Quartus that supports the Arria-V device family.