Epm7128sti100-10n content read

Hi,

the mentioned device has four pins used for boundary-scan testing/in-system programming (ISP) or as I/O pins, according to the programmed content. If these pins are switched to I/O then the device is accessible via parallel protocol for off-line programming only instead of serial JTAG protocol for ISP. The parallel programming protocol is supported with Altera Programming Unit APU from the manufacturer or the 3rd party programmers such as BPM, Data IO, Elnec or System General.

Or the CPLD is broken and further read-out is not possible. These devices have security bit for protection so read-out can lead to incorrect content if programmed with the security bit.

Regards,

Martin

If you're XJTAG setup cannot verify the JTAG chain then I suspect you are stuck. I assume your XJTAG setup works - you've checked it on a known good unit?

If you can't access the device in-system via JTAG then you can attempt to use other programming solutions. However, you'll (very probably) be removing the device from the board to use these. Can you not simply replace the part?

Cheers,

Alex

Hi,

Thank you for the solutions given. I have Golden UUT as well as Faulty UUT. But I want to extract contents form (Epm7128sti100-10n content) Golden UUT and same thing need to be programmed to blank CPLD and replace the Bad IC from Faulty UUT. Can it be possible from XJTAG tool..?

Hi,

Thank you for the solution, You are right, JTAG Chain works in XJTAG tool for the golden UUT, but not faulty UUT, I want to replace the IC CPLD (Epm7128sti100-10n) by extracting Data content from golden UUT and same thing to be programmed on blank IC and replace it in Faulty UUT.

I recommend you use Altera software to examine your device. solution id rd08062004_8065 (https://www.altera.com/support/support-resources/knowledge-base/solutions/rd08062004_8065.html) clarifies what software you need - i.e. MAX+PLUS II. You can download it from here (https://www.altera.com/support/support-resources/download/legacy/asap2/dnl-asap2.html). Downsides of this: a) the download link on this page doesn't seem to work (I can't help there - but this is the right Altera software to use); and b) you will need an Altera programming cable - a USB-Blaster. You might have better luck downloading it from the max+plus ii software updates (https://wl.altera.com/download/legacy/maxplus2/upd-maxplus2_index.jsp) page. Note the system requirements for running this software. To run the full version (not just the 'Programmer Only'), you will also need a license.

Alternatively, I dare say you can examine the contents of the CPLD using XJTAG. You can certainly configure/program FPGAs and CPLDs using their software and pod. However, examining the contents of a programmed CPLD is not something they talk about supporting. You may need to generate a (dummy) '.svf' programming file using altera's quartus tools (http://dl.altera.com/13.0sp1/?edition=web) - version 13.0sp1 supports MAX7000S devices. XJTAG can 'play' this file to program a CPLD. this link (https://www.altera.com/support/support-resources/knowledge-base/solutions/rd06092003_387.html) explains them. You may be able to use the .svf file to determine the commands you need to issue and create your own file to play to read the contents of your CPLD.

Cheers,

Alex