EPM7064STC44-10 I/O standard 3.3-V LVTTL is not supported

Question

Quartus 2 13.0sp1 (64bit)
Device EPM7064STC44-10Timing Models FinalTotal macrocells 32/64 (50%)Total pins 26/36 (72% )
'Error (119028): I/O standard 3.3-V LVTTL is not supported for selected device family'
I intended to use this device in a 5V circuit so 3.3V is irrelevant.I cannot find anywhere to remove this constraint and allow the build to succeed.(The same source file builds OK for a EPM3064 device or EPM7128)
Any ideas?

sstrell · Answer

Are you saying that you didn't set this I/O standard assignment?  Set pin locations and I/O standards in Assignments menu -&gt; Pin Planner in Quartus.

ak6dn · Answer

You must have pin assignments other then type TTL somewhere. I use the same part, same software, compiles just fine.
+-----------------------------------------------------------------------------+
; Fitter Summary                                                              ;
+---------------------------+-------------------------------------------------+
; Fitter Status             ; Successful - Fri Dec 04 02:11:06 2020           ;
; Quartus II 64-Bit Version ; 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition ;
; Revision Name             ; EPM7064S                                        ;
; Top-level Entity Name     ; EPM7064S                                        ;
; Family                    ; MAX7000S                                        ;
; Device                    ; EPM7064STC44-10                                 ;
; Timing Models             ; Final                                           ;
; Total macrocells          ; 63 / 64 ( 98 % )                                ;
; Total pins                ; 36 / 36 ( 100 % )                               ;
+---------------------------+-------------------------------------------------+

and
+-------------------------------------------------------------------------------------------------------+
; All Package Pins                                                                                      ;
+----------+------------+----------+----------------+--------+--------------+---------+-----------------+
; Location ; Pad Number ; I/O Bank ; Pin Name/Usage ; Dir.   ; I/O Standard ; Voltage ; User Assignment ;
+----------+------------+----------+----------------+--------+--------------+---------+-----------------+
; 1        ; 6          ; --       ; TDI            ; input  ; TTL          ;         ; N               ;
; 2        ; 7          ; --       ; IO[3]          ; bidir  ; TTL          ;         ; Y               ;
; 3        ; 8          ; --       ; IO[4]          ; bidir  ; TTL          ;         ; Y               ;
; 4        ; 9          ; --       ; GND            ; gnd    ;              ;         ;                 ;
; 5        ; 10         ; --       ; IO[5]          ; bidir  ; TTL          ;         ; Y               ;
; 6        ; 11         ; --       ; IO[6]          ; bidir  ; TTL          ;         ; Y               ;
; 7        ; 12         ; --       ; TMS            ; input  ; TTL          ;         ; N               ;
; 8        ; 13         ; --       ; IO[7]          ; bidir  ; TTL          ;         ; Y               ;
; 9        ; 14         ; --       ; VCC            ; power  ;              ;         ;                 ;
; 10       ; 15         ; --       ; IO[8]          ; bidir  ; TTL          ;         ; Y               ;
; 11       ; 16         ; --       ; IO[9]          ; bidir  ; TTL          ;         ; Y               ;
; 12       ; 17         ; --       ; IO[10]         ; bidir  ; TTL          ;         ; Y               ;
; 13       ; 18         ; --       ; IO[11]         ; bidir  ; TTL          ;         ; Y               ;
; 14       ; 19         ; --       ; IO[12]         ; bidir  ; TTL          ;         ; Y               ;
; 15       ; 20         ; --       ; IO[13]         ; bidir  ; TTL          ;         ; Y               ;
; 16       ; 21         ; --       ; GND            ; gnd    ;              ;         ;                 ;
; 17       ; 22         ; --       ; VCC            ; power  ;              ;         ;                 ;
; 18       ; 23         ; --       ; IO[14]         ; bidir  ; TTL          ;         ; Y               ;
; 19       ; 24         ; --       ; IO[15]         ; bidir  ; TTL          ;         ; Y               ;
; 20       ; 25         ; --       ; IO[16]         ; bidir  ; TTL          ;         ; Y               ;
; 21       ; 26         ; --       ; IO[17]         ; bidir  ; TTL          ;         ; Y               ;
; 22       ; 27         ; --       ; IO[18]         ; bidir  ; TTL          ;         ; Y               ;
; 23       ; 28         ; --       ; IO[19]         ; bidir  ; TTL          ;         ; Y               ;
; 24       ; 29         ; --       ; GND            ; gnd    ;              ;         ;                 ;
; 25       ; 30         ; --       ; IO[20]         ; bidir  ; TTL          ;         ; Y               ;
; 26       ; 31         ; --       ; TCK            ; input  ; TTL          ;         ; N               ;
; 27       ; 32         ; --       ; IO[21]         ; bidir  ; TTL          ;         ; Y               ;
; 28       ; 33         ; --       ; IO[22]         ; bidir  ; TTL          ;         ; Y               ;
; 29       ; 34         ; --       ; VCC            ; power  ;              ;         ;                 ;
; 30       ; 35         ; --       ; IO[23]         ; bidir  ; TTL          ;         ; Y               ;
; 31       ; 36         ; --       ; IO[24]         ; bidir  ; TTL          ;         ; Y               ;
; 32       ; 37         ; --       ; TDO            ; output ; TTL          ;         ; N               ;
; 33       ; 38         ; --       ; IO[25]         ; bidir  ; TTL          ;         ; Y               ;
; 34       ; 39         ; --       ; IO[26]         ; bidir  ; TTL          ;         ; Y               ;
; 35       ; 40         ; --       ; IO[27]         ; bidir  ; TTL          ;         ; Y               ;
; 36       ; 41         ; --       ; GND            ; gnd    ;              ;         ;                 ;
; 37       ; 42         ; --       ; CLK            ; input  ; TTL          ;         ; Y               ;
; 38       ; 43         ; --       ; OE_N           ; input  ; TTL          ;         ; Y               ;
; 39       ; 0          ; --       ; CLR_N          ; input  ; TTL          ;         ; Y               ;
; 40       ; 1          ; --       ; CLK2           ; input  ; TTL          ;         ; Y               ;
; 41       ; 2          ; --       ; VCC            ; power  ;              ;         ;                 ;
; 42       ; 3          ; --       ; IO[0]          ; bidir  ; TTL          ;         ; Y               ;
; 43       ; 4          ; --       ; IO[1]          ; bidir  ; TTL          ;         ; Y               ;
; 44       ; 5          ; --       ; IO[2]          ; bidir  ; TTL          ;         ; Y               ;
+----------+------------+----------+----------------+--------+--------------+---------+-----------------+
Note: Pin directions (input, output or bidir) are based on device operating in user mode.

pwalk14 · Answer

Thanks for the reply.
No I did not set the I/O (as far as I know)
I tried the 'Pin Planner' approach but 'Show IO Banks' and 'Show VRef Groups' on the &lt;RightClick&gt; menu is greyed out and the Node list at the bottom does not show any voltage setting (as other devices have done).
I have just found that if I select a pin and &lt;RightClick&gt;'Pin Properties' I get  a window where the I/O Standard is '3.3-V LVTTL(default)' but it can be changed to 'TTL'. (Only if the pin is assigned to a node)
Altenatively I can select a node and do a similar thing but still individually.
Presumably if I change this for all pins I should be able to compile.
It would help if there is a way to change the default for all pins before I assign nodes to pins.

pwalk14 · Answer

Thanks for your reply.
Please see my other reply.
Unfortunately when I am using the EPM7064 the fitter was unsuccessful (due to this voltage problem).
Error (119028): I/O standard 3.3-V LVTTL is not supported for selected device familyError: Quartus II 64-Bit Fitter was unsuccessful. 1 error, 1 warningError: Peak virtual memory: 4572 megabytesError: Processing ended: Sat Dec 05 13:31:27 2020Error: Elapsed time: 00:00:01Error: Total CPU time (on all processors): 00:00:01Error (293001): Quartus II Flow was unsuccessful. 3 errors, 8 warnings
Hopefully I will be able to compile once the IO problem is resolved. What would be good is knowing a way to change the default for all the pins rather than individually.

pwalk14 · Answer

Unfortunately changing all the nodes to TTL did not get rid of the error. Possibly there were some (unused) pins still with the 3.3V setting (default). I did see that most  pins on the top (Block) level now had TTL label (similar to pin number) attached but could not see how to add or remove that label from there.
For some reason I seem to be getting fewer resources used when compiling the same source file than before. It seems my mods have somehow lost parts of the design. I shall start again from scratch and start with the EPM7128 (which worked before) before trying the EPM7064 again. It should only need 32 cells but the epm7032 is a bit too tight.
It is puzzling to me that the 7 series devices are 5V/TTL IO but that Quartus doesn't know this and applies an incorrect default in this case. Then it throws an error rather than a warning.
I'm sure there must be a simple answer but I can't see it yet.

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EPM7064STC44-10 I/O standard 3.3-V LVTTL is not supported

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