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PWalk14's avatar
PWalk14
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5 years ago

EPM7064STC44-10 I/O standard 3.3-V LVTTL is not supported

Quartus 2 13.0sp1 (64bit) Device EPM7064STC44-10 Timing Models Final Total macrocells 32/64 (50%) Total pins 26/36 (72% ) 'Error (119028): I/O standard 3.3-V LVTTL is not supported for selecte...
sstrell's avatar
sstrell
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5 years ago

Are you saying that you didn't set this I/O standard assignment? Set pin locations and I/O standards in Assignments menu -> Pin Planner in Quartus.

  • PWalk14's avatar
    PWalk14
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    5 years ago

    Thanks for the reply.

    No I did not set the I/O (as far as I know)

    I tried the 'Pin Planner' approach but 'Show IO Banks' and 'Show VRef Groups' on the <RightClick> menu is greyed out and the Node list at the bottom does not show any voltage setting (as other devices have done).

    I have just found that if I select a pin and <RightClick>'Pin Properties' I get a window where the I/O Standard is '3.3-V LVTTL(default)' but it can be changed to 'TTL'. (Only if the pin is assigned to a node)

    Altenatively I can select a node and do a similar thing but still individually.

    Presumably if I change this for all pins I should be able to compile.

    It would help if there is a way to change the default for all pins before I assign nodes to pins.

    • PWalk14's avatar
      PWalk14
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      5 years ago

      Unfortunately changing all the nodes to TTL did not get rid of the error. Possibly there were some (unused) pins still with the 3.3V setting (default). I did see that most pins on the top (Block) level now had TTL label (similar to pin number) attached but could not see how to add or remove that label from there.

      For some reason I seem to be getting fewer resources used when compiling the same source file than before. It seems my mods have somehow lost parts of the design. I shall start again from scratch and start with the EPM7128 (which worked before) before trying the EPM7064 again. It should only need 32 cells but the epm7032 is a bit too tight.

      It is puzzling to me that the 7 series devices are 5V/TTL IO but that Quartus doesn't know this and applies an incorrect default in this case. Then it throws an error rather than a warning.

      I'm sure there must be a simple answer but I can't see it yet.

      • PWalk14's avatar
        PWalk14
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        5 years ago

        Hi There.

        Well, deleted everything (all project folder) and re-entered design from scratch. (Part block, part verilog)

        Now it works! - Compiles without error, Node properties are TTL(default).

        No idea where the previous default originated.

        Thanks for your comments and replies.