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Altera_Forum's avatar
Altera_Forum
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11 years ago

Epcs with locked sectors

Hello,

this is my first post on this forum, so, first at all, best regards to everybody.

I want ask you for help about locked EPCS. Symptoms are as follow: when I try to erase or program EPCS (by script commands or Flash Programmer or Remote Update function in Nios) then I don't see any error. All seems to be OK. Difference is only in time of this operation (locked EPCS is much faster). But after that, my EPCS still have old contents. Changes are not saved in flash.

I run command <nios2-flash-programmer> with option --debug. There is a line:

"EPCS status is 0x9C" or "EPCS status is 0x9E"

other board (where EPCS isn't locked) show me: "EPCS status is 0x0"

Base on Altera "Serial Configuration (EPCS) Devices Datasheet.pdf" this value (0x9C or 0x9E) means that all sectors in my flash are locked (protected). Question is (surly easy for experts): How can I ublock sectors?

I read many threads on this forum. It seems that, this blocking shouldn't happen. But it did.

In mentioned above pdf I see in chapter "Write Status Operation" what phisilcally I should do. But I can't find answer, how to solve this in easy way. Some special .jic file for Quartus programmer? Add to quartus project module ALTASMI_PARALLEL and by this way program Status Byte?

At the end I though to build (in i.e. VHDL) module, those will send data, as it is described on picture "Write Status Operation Timing Diagram" (in the same pdf) - bit by bit (not yet done).

I use custom board with Cyclone III EP3C16 and EPCS64. For debugging I use USB Blaster and Quartus 13.1. Board IMHO is OK. It was developed 3 years ago, and work well (including Remote Upgrading EPCS by Nios).

Any ideas how to unprotect this EPCS?

best regards,

Gregor

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    So, as I wrote before, I was forced to solve this in dirty way. I made small VHDL module to unlock EPCS. And it's work.

    If somebody will be interested to do this, then he must do as follow.

    In new, empty project set Cyclone to use EPCS pins as normal IO. Then you need to send two commads.

    Do exactly, as it is on followed pictures (they are from Altera document: "Serial Configuration (EPCS) Devices Datasheet" - cyc_c51014.pdf)

    First:

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9113

    Then for one clock set nCS to "1". Next send:

    https://www.alteraforum.com/forum/attachment.php?attachmentid=9114

    Here is byte called "Status register". You should put there value 0x00.

    And that's all. I check this also to lock back EPCS (with "status register" = 0x1C). It's work.

    I'm sure that, there is some easier way to do this, but I don't know how. For now, this is OK.