EP4CE6 Cyclone IVE FPGA regulator question

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From the datasheet on the EP4CE6 under Power Supply Guidelines, it looks like it requires a switching regulator to produce the +1.2V? Can I use a linear regulator to do it, or why is it not recommended?

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You can use a linear regulator, but you will need to check the power dissipation of that regulator.

For example, the DE0-nano uses a linear regulator to create 1.2V from 5V (the USB supply). The attached plot shows the current drawn by the board for designs containing toggle registers (1-bit counters), 4-, 8-, and 16-bit counters. The worst-case current is a little under 500mA.

The power dissipated by a linear regulator with 5V input, 1.2V output, and 500mA load current is;

Pdissipated = (5V - 1.2V) x 500mA = 1.9W

The DE0-nano uses LP38500 linear regulators.

http://www.ti.com/lit/ds/symlink/lp38500-adj.pdf

The DE0-nano uses LLP-8 packaged devices which have a thermal resistance of 80C/W.

For 1.9W power disspation, the linear regulator die temperature would rise 1.9 x 80 = 152C, and would shut-down.

To avoid thermal shutdown, the DE0-nano design uses two stages of linear regulators for the 1.2V; 5V to 3.3V (0.85W dissipation) and 3.3V to 1.2V (1.05W dissipation). So the linear regulator die temperature rise by about 80C. This is about as high as you'd ever want to go.

What is the efficiency of such a design;

Pin = 5V x 500mA = 2.5W

Pout = 1.2V x 500mA = 600mW

Efficiency = Pout/Pin = 24%

Pdissipated = 2.5W - 600mW = 1.9W

Now, how about a switching supply?

I've attached an LTspice design for the LTC3600 switch-mode controller for converting 5V to 1.2V at up to 1.5A. The efficiency is around 88%, i.e., for an output power of 600mW, the input power is 600mW/0.88 = 681mW, so the power dissipated by the regulator is 81mW.

Quite a difference isn't it?

Cheers,

Dave

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For 1.9W power disspation, the linear regulator die temperature would rise 1.9 x 80 = 152C, and would shut-down.

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Does this mean, your power curves are simulation results rather than real measurements?

P.S.: I presume the design is clocked by 50 MHz?

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Does this mean, your power curves are simulation results rather than real measurements?

P.S.: I presume the design is clocked by 50 MHz?

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The measurements are from the DE0-nano at 50MHz.

The comment regarding the linear regulator shutdown could be a little clearer - it was meant to imply "If the DE0-nano 1.2V core was implemented using a single regulator ... ", however, since Terasic used a cascade of two linear regulators, the power was distributed between the two, and the regulators did not shut off (though the die temperatures would have gone up by 80C each - so I didn't run the test for long).

The main point of the post is that switch-mode power supplies are significantly more efficient than linear regulators.

Cheers,

Dave