Honored Contributor
Honored ContributorDepending on the configuration scheme chosen, the FPGA will always try to configure at power up. If there's a valid configuration image then it will always boot and assign the pins 'as per program'. I assume that's what you refer to.
However, you should always be able to take control of the FPGA, via JTAG. Occasionally BSDL files have faults in them. However, with a mature series, like Stratix II, this shouldn't be the case. Download the BSDL file again. Make sure you take it from the "stratix ii bsdl files (https://www.altera.com/support/support-resources/download/board-layout-test/bsdl/stratix2.html)" page. Cheers, Alex
