EP1C3T100C8N FPGA configuration problem

Thank you for your answer BD SLS,

I have no JTAG connexion on my board and cannot test EPCS1 programing through JTAG)

Here is my wiring:

MSEL0=GND

MSEL1=GND

INIT_DONE left not connected

DATA0 (FPGA) <=> DATA (EPCS1)

DCLK (FPGA) <=> DCLK (EPCS1)

nCS0 (FPGA) <=> nCS (EPCS1)

ASDO (FPGA) <=> ASDI (EPCS1)

nSTATUS&CONF_DONE tied to 3.3V VCC through 10K resistor.

nCE (FPGA) receives a '0' from µC I/O

I tried to disconnect nCONFIG from 74HC04 and connect it directly to 3.3V VCC through 10K resistor (to be as the schematics in datasheet), but the problem is the same.

Hope I have not omitted some pins involved in configuration, but as per my understranding, the AS mode is selected by grounding MSEL1-MSEL0??

On my board, FPGA's CLK0 pin is constantly fed by a 16MHz 3.3V clock signal. Hope this cannot "disturb" FPGA during configuration process.

Whitebird