You are correct, when you expose the HPS EMAC into the FPGA, it's a GMII interface. If you want RGMII then you'll need some adapter logic to convert it over to being RGMII before exposing it to FPGA I/O. For the most part this conversion involves changing the data widths and clock rates and you might be able to find code examples on the web that already do this.
When selecting any peripheral to wire into the FPGA fabric, "FULL" essentially means to expose everything. Some of the HPS peripherals are limited by the number of HPS I/O so when you route into the FPGA often you'll be exposing more features.