Forum Discussion
Altera_Forum
Honored Contributor
15 years agoIm afraid you are always going to use up some register space in the mapping. The logic you have wont really use a register, or at least wont use any noticibale amount of FPGA logic.
Personally, I wouldnt have an entity to do it, I would just define a constant in a package or the register controller, but in reality it's no different to what you have. All the TCL scripts you've seen will be doing will be re-writing the VHDL to change the constant defined in the code.