Forum Discussion
AR_A_Intel
Super Contributor
4 years agoHello
Welcome to INTEL forum. In Intel we used OrCAD Symbols (Cadence Capture CIS and Allegro). For Intel FPGA we provide excel files (.xls) in Device Pin-Out Files https://www.intel.com/content/www/us/en/programmable/support/literature/lit-dp.html?1 and schematic symbol generation in (Cadence Capture CIS and Allegro) https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout-test/pcb/pcb-cadence.html?elq_cid=4171900&erpm_id=2892549