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Altera_Forum
Honored Contributor
17 years agoDVI Tx in Cyclone III
Hi there, I'm going to do a prestudy about the DVI/HDMI interface. There is a lot of questions. Perhaps someone could give me some answers? 1. Q: Is it possible to implement a DVI Tx in ...
Altera_Forum
Honored Contributor
17 years agoThe Vcc terminated CML is an unique feature of the DVI physical layer. At lower rates, it can be driven from FPGA I/Os with series termination resistors. But DVI requires bit rates up to 1.65 Gbps, that can't be achieved by Altera High-Speed Differential I/O Interfaces (Stratix IV can achieve 1.6 Gbps, apart from the need for LVDS to CML level conversion). GX transmitters can easily handle the higher rates but can't provide low DVI speeds down to 250 Mbps.
I don't expect, that this situation is basically different with other vendors. So using dedicated external DVI serializers/TMDS drivers seems an easy solution.