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Altera_Forum's avatar
Altera_Forum
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17 years ago

Dual-Clock FIFO with clear in Cyclone III

I use the megawizard to get a dual clock FIFO with aclr. If there was a synchronized clear I would use it, but the megawizard provides no such option.

To get the best synthesis, should I clear it from the read or write side? I have made sure that there are serveral idle clocks between clear and first use.

It seems that the "Synchronize aclr to wrclk" adds a piece of sync logic (2 Registers). aclr fans out to a number of components, both after and before the sync stage. For some reason, however, serveral registers gets the unsynchronized aclr despite beeing clocked by wrclock. This upsets TimeQuest. According to some appnote the *dffpipe* nodes can be disregarded, but there are other nodes too (I can find out exactly which ones, but I seem to miss some obvious problem with this).

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    If you have several idle clocks, it technically doesn't matter, but synchronizing the aclr to wrclk is good to have on. That protects the FIFO in case your wren is high out of reset. The reason the read side doesn't get a synchronized version is that it's not necessary. The protection circuitry prevents any reads from occurring since the FIFO is empty out of power-up, so even if rden were high, it is essentially ignored. (And if you disable protection circuitry and do a read out of power-up, well, good luck...)

    There are two things I would recommend:

    a) Cut timing between the two asynchronous clock domains, if possible. I assume you're using this dual-clock FIFO because there is no relationship between them.

    b) If you still have recovery timing violations(like the reset is synchronized in your logic to the read domain, and then directly feeds registers in the FIFO on the read domain, step a) wouldn't cut these paths), feel free to add a false path from your reset control into the DCFIFO:

    set_false_path -from [get_keepers your_reset_name] -to [get_keepers *dcfifo*]

    (naturally, the names could be cleared up)
  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    I don't know about recovery and removal paths, but for setup and hold paths the cross-domain set_false_path exceptions are added automatically starting in version 8.0. They are inserted in a FIFO source file for use by TimeQuest similar to how the megafunction has long inserted cut-path assignments for the Classic Timing Analyzer into the FIFO source.