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Altera_Forum
Honored Contributor
14 years agoDSP Senior Project Question
Hey Guys, Im an EE major just starting on my BSEE senior project. It is to create an FPGA based acoustic echo canceller. We have to use a 1024 tap adaptive FIR filter. It is require...
Altera_Forum
Honored Contributor
14 years agoHe said that research showed that some blocks should have their coefficients updated more often than others.
He said that rather than update 1024 coefficients each time a new sample arrives, just update 128 coefficients when a block of 128 arrives.