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Altera_Forum
Honored Contributor
Honored ContributorDSP Dev Kit Ethernet & SRAM issue
Hi,
I am currently working on DSP development kit (Stratix ii edition). I am basically trying to port a design from some other board to this board. However, while connecting the pins I discovered that the data pins for ethernet and sram are the same? this is what is given in the manual for both the ethernet and the sram in two separate tables pin name pin number SE_D0 AD18 SE_D1 AB19 so does this mean that i can only use one of the two at a time? or am i missing some finer point, beacause i am just a beginer. thank you vik.vik4 Replies
Altera_Forumthanks again, i get the point.. :)
- Altera_Forum
If your open source SoC does not support the idea of a Tri-state interface, they you're going to have to write some logic to arbitrate access to the bus. For instance, you could simply use the read, write, and chipselect signals to gate control of the bus. If there is the possibility that two components will try to access the bus at the same time then you'll have to write some fancier arbitration logic (like controlling the wait or ready signal to the components).
Jake - Altera_Forum
Thanks for the reply Jake.
However, I dont intent to use SoPC builder. I am using an open source SoC, and during pin assignment, quartus will not allow me to assign two different signals to the same pin. so does that mean that i will have to write a module my self ? thanks vik.vik - Altera_Forum
You can use both in the same time but you can only access one or the other at a time. I believe the intent is to use a tri-state bridge inside SoPC builder.
Jake
