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number_7's avatar
number_7
Icon for New Contributor rankNew Contributor
1 year ago

DisplayPort IP quartus v24.1 reference design with ftile transceiver IP

I have generated the reference design for display port IP with help of user guide " F-Tile DisplayPort Intel® FPGA IP Design Example User Guide" version 20.0.1. The reference design having F tile...
Configuration
Generic Io
Other Ips
Programmable Logic Device
VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
1 year ago

Hi @number_7,


We sincerely apologize for the inconvenience caused by the delay in addressing your Forum queries. Due to an unexpected back-end issue in our system, your Forum case, did not reach us as intended. As a result, we have a backlog of cases that we are currently working through.


Please be assured that we are doing everything we can to resolve this as quickly as possible. This will take some time, and we appreciate your patience and understanding during this period of time. Your case will be attended to by AE soonest possible.


Thank you again for your patience and understanding, and we are committed to provide you with the best possible support.


Best Regards,

Ven