Forum Discussion
jozephka99
Contributor
ContributorDiscrete RSU User Logic
Hi,
I want to do an discrete RSU with UART interface. I wrote the UART, RAM and on-chip memory in VHDL but how can I write dualboot and user logic of RSU. There is an atom for RSU implementation pu...
JohnT_Altera
Regular Contributor
Regular ContributorHi,
The fallback will automatically happen when the configuration failed. In order to update the CFM then you will need to use the On Chip Flash IP.
You may refer to https://fpgacloud.intel.com/devstore/platform/17.1std.1/Standard/i2c-remote-system-update-example/ on how to implement RSU in Max 10.
RVadl2Occasional Contributor
@JohnT_Intel Hi, I am following the example that you mentioned i.e
https://fpgacloud.intel.com/devstore/platform/17.1std.1/Standard/i2c-remote-system-update-example/
Can you point me to Altera example projects that contain the source files(c files) of nios_platform.pof and source files of RSU.sof.
Thanks in Advance.
