Disabling PLL for Cyclone III

Question

I am working to design a Cyclone III FPGA powered off of a 1.5 V battery. As I research powering all different parts of the FPGA, it looks like most output/input buffers etc. are receptive to this lower voltage logic (LVCMOS). However, from what I've gathered, the analog PLL must be connected to 2.5 V even if I am not using it. Is this true, or is there an easy workaround for either powering everything from the 1.5 V battery or bypassing the PLL so that it is not necessary to provide it power?

Thanks!

altera_forum · Answer

Powering the VCCA pins at 1.5V will clearly be out of spec. However, more importantly, the configuration process will not start until the correct voltages are detected on certain pins. This includes the VCCA pins. So, you're FPGA will not work unless VCCA is within spec.

Read the Configuration Process section on page 9-8 of the configuration, design security, and remote system upgrades in the cyclone iii device family (http://www.altera.com/literature/hb/cyc3/cyc3_ciii51016.pdf).

I trust you were not proposing to power the VCCINT pins at 1.5V...?

Cheers,

Alex

altera_forum · Answer

Hi Alex,

Thank you for the quick reply! Yes, looking at the document you attached, it does appear that I cannot provide the necessary voltage to make the Cyclone III FPGA work at 1.5V. I have been looking around without success: Do you know of an FPGA comparable to the Cyclone III EP3C16M164C8N that can run completely off of a 1.5 V battery? I have been unable to find any such FPGA, but I would assume that they must exist, and that I am just looking in the wrong places.

altera_forum · Answer

I'm not aware of any, no.

However, all is not lost. I suggest you look at a charge pump to generate VCCA - you won't need much current. You need to regulate down to 1.2V for VCCINT. Maxim do a max1682 (http://www.maximintegrated.com/en/products/power/charge-pumps/max1682.html) voltage doubler intended for battery driven appliances. Put your newly regulated 1.2V rail into it and you'll have something in spec...

Cheers,

Alex

altera_forum · Answer

That should be perfect. I am working on designing an FPGA powered hearing aid, and I saw that maxim has a great article with an introduction to hearing aid design constraints that recommends some components to use.

altera_forum · Answer

To add on, you can refer to the pin connection guideline on the recommended way to connect the power pins as well as the recommended voltage value. You should ensure the power levels are within the specs to avoid damaging the device or unexpected behavior of the device.

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Disabling PLL for Cyclone III

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