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Altera_Forum
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11 years ago

Disabling PLL for Cyclone III

I am working to design a Cyclone III FPGA powered off of a 1.5 V battery. As I research powering all different parts of the FPGA, it looks like most output/input buffers etc. are receptive to this lo...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

To add on, you can refer to the pin connection guideline on the recommended way to connect the power pins as well as the recommended voltage value. You should ensure the power levels are within the specs to avoid damaging the device or unexpected behavior of the device.