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Altera_Forum
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11 years ago

Disabling PLL for Cyclone III

I am working to design a Cyclone III FPGA powered off of a 1.5 V battery. As I research powering all different parts of the FPGA, it looks like most output/input buffers etc. are receptive to this lo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

That should be perfect. I am working on designing an FPGA powered hearing aid, and I saw that maxim has a great article with an introduction to hearing aid design constraints that recommends some components to use.