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Honored Contributor
Honored Contributordifferent width dual port ram from VHDL template
Dear all, In my design I have a dual port memory, where the write port is 128x32 configuration and read port is 4096 x 1. I have written the module in the VHDL, but my implementation results in...
Altera_ForumHonored Contributor
Honored ContributorI am in need of higher clock more than 600MHz.... In Altera Fpga kit it has an internal clock upto 50Mhz. If i use any external clock source, which is going to be compatible? function generator or crystal oscillator. Is Crystal oscillator alone is enough to form the external clock
