Forum Discussion
Altera_Forum
Honored Contributor
15 years agoCache memory is implemented with on-chip memory and control logic. Tightly coupled memory is implemented with on-chip memory and a dedicated connection.
Tightly coupled memory has a fixed span in the address map. Cache does not live in the address map (.... well it kinda does.... just don't think of it as a physical memory) but instead serves as an intermediate between the processor and the memory to (hopefully) provide more efficient memory accesses. Tightly coupled memory has deterministic access time. Accesses through the cache are not deterministic since the data will either live in the cache (hit) or the data must be fetched from main memory (miss). For what you are trying to do I would recommend taking a look at this since it should give you much more bandwidth: http://www.alterawiki.com/wiki/nios_ii_udp_offload_example