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Honored Contributor
Honored ContributorDesign portability on a cyclone
Good morning, I've got a HDL design which run in RTL simulation. This design run in gate level simulation with time modelisation on a stratix II or an arria II. Howerver, it doesn't work on ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- However I don't understand why it work. --- Quote End --- Neither do I. Megafunction inference is sometimes mysterious... In this case, the constant type seems to be the problem. It's a kind of Quartus design compiler bug in my opinion.
