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Altera_Forum
Honored Contributor
16 years agoDesign portability on a cyclone
Good morning, I've got a HDL design which run in RTL simulation. This design run in gate level simulation with time modelisation on a stratix II or an arria II. Howerver, it doesn't work on ...
Altera_Forum
Honored Contributor
16 years agoDuring the compilation, I have "approximatily" the same message for the stratix and the cyclone. No interresting warning.
I found one warning when I looked at the waves in ModelSim. The message is "There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es)". That's means I've got an issue with a multiplier ? thanks