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Altera_Forum
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12 years ago

Decrease configuration time

Hi all, I have a Cyclone III LS set for Standard AS configuration (MSEL[3:0] = 0010) using an EPCS64 to store the config file.

I'd rather not make a PCB change, so the MSEL pins will probably have to stay as they are.

I'm looking to make the FPGA configuration time as short as I possibly can.

I enabled "Generate compressed bitstreams" in Device and Pin Options. I also turned on compression when converting the .sof to a .jic.

Is there anything else I can do to minimize the time?

Thanks!