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Altera_Forum
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10 years ago

DE0-Nano-SoC: How HPS(ARM) recognizes f2h_irq0 or f2h_irq1 interrupts from FPGA

I designed a block in Verilog. When data processing is finished, this FPGA block sends an interrupt signal to HPS using one of dedicated interrupt line: f2h_irq0 or f2h_irq1. The question is how HP...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi there,

Can you put that project back up? The link has expired. It seems to be exactly what I'm looking for.

Thanks