DDR2 DQSn Pin Question

Unless you make a psudo-diff pin set by taknig the signal and it's inversion - placing them next to each other and adding proper termination on the board. THen it will be a mtter of the speed you are looking to obtain - best to do some PCB simulation with something like HyperLinx to make sure it all works.

Regards,

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Cyclone III documentation says that Differential SSTL is only supported on dedicated clock input and dedicated PLL output pins.

Thus, I'm afraid that, no, you can't use a differential DQS in a Cyclone III.

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Hi,

it depends.

In DDR2, the DQS signal may either be single ended or differential.

Take a look in your DDR2 device's datasheet about this.

If you are using a diferential DQS, then you need to set the DQS signal to the a differential SSTL I/O standard. The DQS_n signal will then be automatically assigned to the proper pin.

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But I can not find any DQSn pin in the Cyclone III device, is that means CIII device can not support differential DQS mode?

Thanks

Hi,

it depends.

In DDR2, the DQS signal may either be single ended or differential.

Take a look in your DDR2 device's datasheet about this.

If you are using a diferential DQS, then you need to set the DQS signal to the a differential SSTL I/O standard. The DQS_n signal will then be automatically assigned to the proper pin.