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Altera_Forum
Honored Contributor
11 years agohttps://dl.dropbox.com/s/u55onq23etlxywi/report1.jpg
problem: 1,the signal of local_init_done is always low when the i set the reference clock of ddr2 controller to 50MHZ,I use a Oscilloscope to test pin A-DDR2-CK,it is 125MHZ 2,the signal of local_init_done is high when i set the reference clock of ddr2 controller to 100MHZ(actually is a 50MHZ crystal.............),I use a Oscilloscope to test pin A-DDR2-CK,it is 62.5MHZ(==!.................................) https://dl.dropbox.com/s/ewa48imv4ae6zda/report2.jpgquestion: 1,how to use altpll's clk output as the input refence clock of ddr2 controller,because i must Instantiate two controller.I have tried to add a altpll,but some critical warning turn out about dedicated clock..... 2,after i add the mem_addr siganl to signaltap instance,there are many critical warning...more then 200....
if you can't see the picture please download the attachment 3:screenshot.zip