Forum Discussion
AdzimZM_Altera
Regular Contributor
3 years agoHi Greg,
The EMIF interface required a lot of resources. This may not applicable to instantiate 8 interfaces in a design.
An Altera GPIO IP can support a maximum interface frequency of 300 MHz. This will limit the clock rate of the design.
This is the limitation of the IP itself.
Regards,
Adzim