dear alex,
We are using sufficient number of decaps close to the FPGA pins and the VCCINT supply is very clean.
Now our only concern is the power consumption of VCCINT. We will estimate it with "PowerPlay Early Power Estimators".
But i would like to mention that we are using separate dual output(3V3- 500mA and 1V2-250mA) for each EP4CE55F23I7N FPGA.
Also we have not used the power estimation tool till now for our power analysis.
I would like to mention here that the earlier PCB in which this power section was stable used EP3C16F484I7N FPGA, and there we used somewhat similar FPGA resources.That was why we copied the power section from there in our new design.
Now i would like to ask that can this VCCINT failure cause damage to the FPGA's JTAG port?? And also in one of the boards the FPGA's VCCIO and GND pins were found shorted after some time.
Kindly suggest.
Thanks and regards.