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Altera_Forum's avatar
Altera_Forum
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8 years ago

Cyclone VE starts config from N25Q then fails midstream

I have a design that I want to use the Micron N25Q128 flash in, so to test it I bought the DE0-CV board from Terasic (comes with the Spansion 64Mb serial) and swapped the serial flash parts out. Having done that, and recreated my project for the 128Mb I have an odd problem. The board configures fine with JTAG, my project works there. Programming the N25Q part reports success and passes verification. BUT the FPGA will not boot from it. So I put some probes on the data coming out of the serial flash and noticed something odd.

(I've tested both speeds but the problem is noticeable on the 100MHz option)

1. I configure my project to us AS and to run the config at 100MHz internally generated

2. I program my file in to the serial flash.

3. Power cycle the board.

4. The FPGA sends over a CLK and READ DATA command.

5. Serial flash returns a datastream that is accepted by the FPGA as shown by the FPGA changing from 10MHz to 100MHz

6. More data is supplied by the serial part.

7. A few dozen usec later the config fails.

I checked trying to config without increasing the clock speed and get the same failure.

Any thoughts on why the N25Q part would get part way through the config successfully then fail?

https://alteraforum.com/forum/attachment.php?attachmentid=13476&stc=1

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Are you confident the DE0-CV development platform is capable of booting at 100MHz?

    The DE0-CV ships with a standard EPCS64 whose max operating frequency is 20MHz - 40MHz if fast read is enabled, something none of the reference designs use. Add to that the board's embedded USB-Blaster CPLD, which also connects up to the same serial flash, and you already have a less than ideal topology for the higher speed operation you're after.

    In any final solution you may capture you're unlikely to be hanging anything else of the serial FLASH, allowing you to realise a layout that will operate at 100MHz. This I have done, using the same Numonyx/Micron device you've mentioned. Terasic have captured a design that offers flexibility - at a cost - the cost being a board that (probably) won't support the higher speed configuration.

    So, I expect the FPGA is seeing errors in the configuration stream. I assume it will boot at a lower speed...?

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    Good thought that the dev board might not be laid out for high speed config. I tested again with the only change being config clock set to 12.5MHz (slowest option in Quartus). Scope capture confirms that the clock speed does not go above 12.5MHz but unfortunately I see the exact same issue, the config fails a few dozen usec into the datastream. Just as a sanity check I recompiled the default program that came with the board with the slow clock (testing that and my quartus install) and ran it on my unmodified board as a comparison. The unmodified board boots successfully at 12.5MHz.

    You mentioned that you built a project with the Micron flash, do you recall if it requires any specific options in Quartus? I disabled ID Check when building my files but I haven't done anything else. Is there maybe an app note from Micron comparable to the Spansion/Cypress notes?

    Thanks

    Simon
  • Altera_Forum's avatar
    Altera_Forum
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    8 years ago

    I don't recall I'm afraid. The fact I don't tells me, the likelihood is, that it wasn't an issue.

    Our final solution would have programmed the serial flash using a .jic file. How are you programming yours? I don't recall needing to disable any device checking when using a .jic, only when programming via Nios - which does have problems when using devices that aren't supported by the Nios flash programmer. There is a work around. However, it sounds like you are able to program your image in - something you wouldn't be able to do if this was the issue.

    Cheers,

    Alex
  • ArcticRain's avatar
    ArcticRain
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    7 years ago

    I seem to be seeing a similar issue, were you ever able to resolve this? What turned out to be the problem?

    Thanks!