Cyclone V SoC AHB BUS

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Hi

I need an AHB bus outside the hps with qsys. The HPS has an h2f_axi_master and f2h_axi_slave_bridge. The qsys interconnect guide is not helpful :cry:..

some idea where to start? some examples? or something else ?

thanks

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Hi,

AHB is not equal with AXI interface.

AHB is between HSP-FPGA bridges for example. The signals you mentioned are AXI interface signals.

For details see the Cyclone V SoC Handbook: http://www.altera.com/literature/hb/cyclone-v/cyclone5_handbook.pdf

For reference design which contains HPS integrated with some FPGA slave peripherals here (called Golden HW/SW reference design - ghrd/gsrd):

<altera_installation_directory>\13.0sp1\embedded\examples

This FW design uses LW HPS2FPGA bridge, but easily can be replaced with high-speed HPS2FPGA bridge connected to a BRAM on FPGA side.

ZS.V.