Cyclone V LVDS & DDR3 on same bank

Hello,

I am planning to use a Cyclone V 5CGTFD7D5F31 with the following requirements;

- 32 bit DDR3 interface Top and Bottom (64 bit total)

- 68 LVDS input pairs

Once I have assigned pins to the HMC for the DDR3 interfaces I am left with the following available LVDS RX pairs per bank;

3A: 8

3B: 6

4A: 5

5A: 8

5B: 12

6A: 20

7A: 5

8A: 14

Total: 78

The HMC uses banks 3B, 4A, 7A & 8A, so I will need to have both LVDS and DDR3 signals in these same banks.

Here’s the crunch:

DDR3 requires that VCCIO is set to 1.5V, while LVDS requires that VCCIO is set to 2.5V. VCCPD should be 2.5V in both cases (table 5-1).

From C5 handbook, Vol 2:

Page 5-2; “VCCPD powers the LVDS input buffers”.

Page 5-12; LVDS Input RD OCT; “You can use RD OCT when you set both the VCCIO and VCCPD to 2.5 V.”

So, assuming that the LVDS input buffers are powered from VCCPD = 2.5V, can I use the LVDS differential inputs if VCCIO is set to 1.5V fro DDR3?

Also, can I use RD OCT?

If not, can I do it with external RD?

Any guidance would be greatly appreciated!

Thanks, Ken