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Altera_Forum
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12 years ago

Cyclone V + Micron DDR3 + Uniphy + NiOS == always freezing

Dear All, I beg your support (and begging I meant serious :(), after three consecutive weeks of having burned engineering time, I decided surrendering with that Cyclone V Dev board and to post ...
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Altera_Forum
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11 years ago

There is a bug in the memory controller, so you need to manualy change some lines of a file generated with Qsys.

If you check in examples you got with the board in file:

cycloneVGT_5cgtfd9ef35_fpga\examples\board_test_system\qts_ddr3\c5gt_ddr3.zip\c5gt_ddr3\c5gt_ddr3.v

it says: 


/*
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
!! You manually have to fix the HMC issue.
!! Open the uniphy top RTL(q_sys_fpga_sdram.v)
!! then, find the line that contains...
!! 	.mp_cmd_clk_1(1'b0),
!! change this to 
!! 	.mp_cmd_clk_1(mp_cmd_clk_0_clk),
		.mp_cmd_clk_1            (mp_cmd_clk_0_clk),                           //        (terminated)
		.mp_cmd_reset_n_1        (mp_cmd_reset_n_0_reset_n),            //        (terminated)
		.mp_cmd_clk_2            (mp_cmd_clk_0_clk),                           //        (terminated)
		.mp_cmd_reset_n_2        (mp_cmd_reset_n_0_reset_n),            //        (terminated)
		.mp_cmd_clk_3            (mp_cmd_clk_0_clk),                           //        (terminated)
		.mp_cmd_reset_n_3        (mp_cmd_reset_n_0_reset_n),            //        (terminated)